Along with a high density integration and a high speed performance of ICs, concerted efforts are being made to develop technologies to increase the number of terminals and to narrow the pitches of a package on which such an IC is mounted. With respect to this, a technological progress is underway to fabricate a circuit module, on which electronic devices such as an IC is mounted, that is larger in scale, faster in speed, and smaller in size. In order to achieve such a miniaturization and high density of a circuitry, it is required to increase the number of wiring layers, to miniaturize wirings, and to develop a technology to enable mounting of electronic components including an IC inside a circuit substrate. Further, with respect to a method of mounting an IC, a flip-chip technology, which allows for a high density mounting, has been widely available. As a circuit substrate appropriate for the purposes, a multilayer ceramic substrate, a multilayer resin substrate, or a combination thereof are being used.
With respect to a circuit substrate, a high-density mountability, high-speed performance and low costs are the characteristics that are strongly required. As a result, to satisfy these requirements, efforts are actively being made to develop a combined multilayer substrate composed of a ceramic multilayer substrate and a resin substrate. For example, Japanese Patent Laid-open Publication No. 2002-374067 discloses a circuit substrate composed of a ceramic multilayer substrate stacked and bonded, by pressurization and heating, with a resin base material formed of thermoplastic resin on which conductive wiring patterns are formed and via holes are disposed within its interlayer connective sections. In accordance with this configuration, the fabrication step of a multilayer substrate composed of a multilayer ceramic substrate and a resin base material becomes simplified. Further, given that a reliable bonding between a multilayer ceramic substrate and a resin base material can be achieved, a highly reliable circuit substrate can be obtained.
Further, Japanese Patent Laid-open Publication No. 1998-256413 discloses an IC package composed of a ceramic multilayer substrate, within which a cavity is formed where an IC is mounted, bonded on and combined with a resin base material having a conductive layer and an insulating ceramic layer. In accordance with this configuration, since a wiring length and distance can both be reduced given that a patterned conductive layer can be formed on a resin base material, it is possible to achieve a miniaturized IC package with a high density wiring therein.
As noted above, with respect to a circuit substrate, miniaturization, high-speed performance and high performance are the characteristics strongly required. However, according to the first prior art reference above, since a multilayer wiring is not formed on the ceramic multilayer substrate, the substrate only serves as a base material. Further, the disclosed technology only enables an IC to be surface mounted. Therefore, in accordance with the technology, a high performance complex circuit substrate cannot be achieved.
Further, in the second prior art reference above, a resin base material having a conductive layer is interposed between the ceramic multilayer substrates while the layers are bonded using an adhesive and an IC is mounted in the cavity. However, since the ceramic multilayer substrates disposed on opposed surfaces function as the main component, fine wiring patterns cannot be achieved. Further, the problem of high costs has remained to be solved given that double-surface wirings would be required for a ceramic multilayer substrate in order to mount additional electronic components on the surface opposed to a mounting surface, the mounting surface being connected to a circuit substrate by using conductive balls. In addition, in order to be compatible with a high-speed performance IC, for example, a bypass capacitor must be connected to an electrode terminal of the IC at a minimum distance. However, in the second prior art reference, since a bypass capacitor cannot be mounted on an upper portion of the cavity, the capacitor can only be mounted on an external circuit substrate. Consequently, it has remained to be solved that an extensive wiring distance prevented achieving a high-speed operation.